6.12 System Interface Block Data Ordering
Processor Coherency Data Responses
The address of external intervention requests are internally aligned by the processor to a quadword address. If the processor determines that it must issue a processor coherency data response, it supplies the data in a subblock order sequence beginning at the quadword-aligned address specified by the corresponding external coherency request.
Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96
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